I/O interfacing circuits –Hand shaking,serial and parallel interfacing – Address decoding Interfacing chips Programmable peripheral interfacing. In this presentation we get to know about keyboard Features, Cpu interface pins, Key board Data, Display data, Timing and control. Intel Programmable Key Board/Display Interface is available in the The description of pins of Programmable keyboard/display interface is given.

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Interface of Code given in text for reading keyboard. Its data buffer interfaces the external bus of the system with the internal bus of the microprocessor. Unlike the 82C55, the must be programmed first.

In the Interrupt modethe processor is requested service only if any key is pressed, otherwise the CPU will continue with its main task. Usually decoded at port address 40HH and has following functions: SL outputs are active-low only one low at any time.

If two bytes are programmed, then the first byte LSB stops the count, and the second byte MSB starts the counter with the new count. Decoded keyboard with 2-key lockout.

It has two modes i. In the keyboard mode, this line is used as a control input and stored in FIFO on a key closure.

Microprocessor – Programmable Keyboard

Interface of 2 Keyboard type is programmed next. The keyboard first scans the keyboard and identifies if any key has been pressed. Sl outputs are active-high, follow binary bit pattern or This unit contains registers to store the keyboard, display modes, and other operations as programmed by the CPU. Interface of WWBB The display write inhibit control word inhibits writing to either the leftmost 4 bits of the display left W or rightmost 4 bits. The previous example illustrates an encoded keyboard, external decoder used to drive matrix.


Causes DRAM memory system to be refreshed. Consists of bidirectional pins that connect to data bus on micro.

Used for controlling real-time events such as real-time clock, events counter, and motor speed and direction control. Scan line outputs scan both the keyboard and displays. Generates a basic timer interrupt that occurs at approximately If more than 8 characters are entered in the FIFO, then it means more than eight keys are pressed at a time.

Once done, a procedure is needed to read data from the keyboard. BB works similarly except that they blank turn interfaace half of the output pins. The keyboard consists of maximum 64 keys, which are interfaced with the CPU by using the key-codes.

This is when the overrun status is set. The timing and control unit handles the timings for the operation of the circuit.

Intel 8279

Till it is pulled low with a key closure, it is pulled up internally to keep it high. The Shift input line status is stored along with every key code in FIFO in the scanned keyboard mode.

Encoded keyboard with N-key rollover. Each counter has a program control word used to select the way the counter operates.


8279 – Programmable Keyboard

This mode deals with the input given by the keyboard and this interfsce is further classified into 3 modes. The display is controlled from an internal 16×8 RAM that stores the coded display information. These are the output ports for two 16×4 or one 16×8 internal display refresh registers.

Scans and encodes up to a key keyboard. The data from these lines is synchronized with the scan lines to scan the display and the keyboard. These lines can be programmed as encoded or decoded, using the mode control register.

Keyboard Interface of First three bits given below select one of 8 control registers opcode. This unit first scans the key closure row-wise, if found then the keyboard debounce unit debounces the key entry.

Minimum count is 1 all modes except 2 and 3 with minimum count of 2. Clears the display or FIFO. In the scanned sensor matrix mode, this unit acts as sensor RAM where its each row is loaded with the status of their corresponding row of sensors into the matrix. Six Digit Display Interface of The Keyboard can be interfaced either in the interrupt or the polled mode.